Source: hyperstructured.greg X account
Author: hyperstructured.greg
Compiled by Alex Liu, Foresight News
RISC Zero, a ZK infrastructure company with $40 million in funding, today officially launched zkVM 1.0, a production-ready version of its universal zkVM. The zkVM race has already had production-ready players, but most people may often hear "zkEVM" but don't know what "zkVM" is. This article introduces the advantages of the instruction set used by most zkVMs. For more information about zkVM, you can read this article.
zkVM is more general than zkEVM, unlocking the possibility of writing programs in general languages and writing code outside the Solidity library, and has become a hot track nowadays. The leading projects on the track, RISC Zero, Succint, Lita, and jolt built by a16z, are all based on the RISC-V instruction set. What are its advantages? Why will the future of zkVM be based on the RISC-V architecture? Why is @rv_inc building tools to allow formal verification at the RISC-V level?
The RISC-V instruction set has the following main advantages:
Open and scalable architecture:
RISC-V is an open standard instruction set architecture (ISA) that is free to use for any type of purpose and is highly adaptable and customizable. This allows zkVM developers to tailor the architecture specifically for proof operations, optimizing performance and efficiency. Why does Linux occupy the largest share of server systems? The word "free" is really important!
Modularity and flexibility:
The modular nature of RISC-V enables zkVM developers to implement only the functionality they need, avoiding unnecessary complexity and overhead. The advantages of modularity have been emphasized too many times in this cycle to be repeated here.
Standardization and Ecosystem Support:
RISC-V has a rapidly growing ecosystem with extensive toolchain support, including compilers and debuggers. For example, @rv_inc is building formal verification tools for the RISC-V ISA. A rapidly growing ecosystem means a broad space for innovation, which can sometimes achieve synergistic effects of killing two birds with one stone.
Efficient proof generation and verification:
The simplicity of RISC-V design helps to more efficiently execute the complex algorithms involved in zero-knowledge proofs. By leveraging the RISC-V instruction set architecture, zkVM can achieve better performance in terms of speed and resource utilization, which is critical for the aggregation of proofs.
Security and Formal Verification:
RISC-V's clear and well-defined architecture makes it easier to apply formal verification techniques, which is critical to ensuring the security and correctness of zkVM. By using RISC-V, developers will be able to leverage formal verification tools and methods to build a more secure zkVM.
Cross-platform compatibility:
RISC-V's compatibility with a wide range of hardware platforms (including X86, x64, and ARM, which means common Windows, Mac, and a variety of simple electrical devices) means that zkVM can be deployed across a wide range of environments. Such flexibility is key to proving widespread adoption of converged solutions, as it allows seamless integration into different systems.
Language universality:
RISC-V does not have a built-in concept of wallet addresses or other blockchain structures. The instruction set consists mainly of operators that move data between memory locations and perform mathematical operations on data. At the same time, compared to EVM, the underlying RISC-V simulator allows programmers to write programs for zkVM in languages such as Rust, C/C++, and Go. This means that zkVM programmers can use related libraries developed by others in the language's ecosystem. For example, Rust libraries developed for Solana, etc.
As the concept of "universal computing" becomes increasingly popular, what kind of spark will zkVM bring to the current fierce VM competition (MoveVM, SVM, EVM, zkEVM...)? Can it gain considerable adoption and gain a firm foothold? The first player, RISC Zero, has made a brilliant debut, and the rest will be left to time to verify.